Schedule

June 17, 2022
Start time Session   Presentation/Paper Title
9:30 AM
9:45 AM
Keynote Speaker #1
10:00 AM Break
10:30 AM
Session # A
Paper #
 1-1 Architecture Enhancement of Convolutional Neural Networks for Arrhythmia Classification
Session # B
Paper #
 2-1 Toward Accurate Timing Analysis for Transistor-Level Programmable Fabrics
11:15 1-2 Hardware for Quantized Mixed-Precision Deep Neural Networks 2-2 Side-Channel Attack (SCA) Power Leakage Analysis on Edge-Pursuit Comparator Circuit
11:45 1-4 A Demonstration of Optical, Doppler and Thermal Sensor Fusion in A Portable Personal Safety Device  
12:00 PM Lunch Break
12:45
Keynote Speaker # 2
1:45 Break
2:00
Session # 3
Session Chair: Dr. Parthasarathy Guturu
Paper #
 3-1 A Low Power Front-End for Resistive Sensors Based on Switch-Cap Current Reuse
Session # 4: Special Session on HW Security
Session Chair: Benjamin Carrion Schaefer
Paper #
 4-1 Hardware-assisted neural network IP using non-malicious backdoor and selective weight obfuscation
2:15 3-2 Data Acquisition and Online Pressure Map Generation for a Defect-Engineered MoS2-Based Piezoelectric Sensor Array 4-2 Investigating the Effect of different eFPGAs fabrics on Logic Locking through HW Redaction
2:30 3-3 Low-Cost Browser-Based Test Bench Using Arduino 4-3 Probabilistic Output Corruptibility Metric of Logic Locked Circuits Under Partial SAT Attacks
2:45 3-4 Mixed Reality Tailored to the Visually-Impaired 4-4 High-Level Methods for Hardware IP Protections: Solutions, Trends, and Challenges
3:00 Break
3:30
Industrial Presentation
# 1
4:30 End of Day 1

June 18, 2022
Start time Session   Presentation/Paper Title
9:30  
9:45
Keynote Speaker # 3
10:45 Break
11:00
Session # 5
Session Chair: Dr. Hoi Lee
Paper #
 5-1 Re-Configurable Gain, Bandwidth, Chopper Stabilized, Biosignal Amplifier Design in 180nm CMOS Process
Session # 6: Special Session on Approximate Computing
Session Chair: Prof. Jorge Castro Godinez - Instituto Tecnologico de Costa Rica
Paper #
 6-1 Probability-Based DSE of Approximated LUT-Based FPGA Designs
11:15 5-2 A Fully-Integrated Reconfigurable CMOS Power Amplifier Utilizing a Novel Impedance Matching Topology 6-2 A Decision Tree Synthesis Flow for Precise and Approximate Circuits
11:30 5-3 A Sub-1V, Current-Mode Bandgap Voltage Reference in Standard 65 nm CMOS Process 6-3 An Exploration of Accuracy Configurable Matrix Multiply-Add Architectures using HLS
11:45 5-4 Ferroelectric Capacitor Modelling in LTSpice 6-4 A Multiplier-less Level-3 Haar Wavelet Transform Approximation Requiring Five Additions Only
12:00 Lunch break
12:45
Session # 7
Session Chair: Dr. Terry Blake
Paper #
 7-1 Design and Implementation of TLS Accelerator
Session # 8: Special Session
Session Chair: Dr. Gayatri Mehta
Paper #
 8-1 Power, Performance, and Area Analysis of Hardware Design Techniques for GF(2^k) Greatest Common Divisor computation
1:00 7-2 Detecting Transformer Fault Types from Dissolved Gas Analysis Data Using Machine Learning Techniques 8-2 Area and Power analysis of a Scalable Primitive Polynomial computation circuit over the field GF(2)
1:15 7-3 EaseMiss: HW/SW Co-Optimization for Efficient Large Matrix-Matrix Multiply Operations 8-3 Survey on Quantum Noise-Aware Machine Learning
1:30    
1:45 Break
2:15
Industrial Presentation
# 2
3:00 Break
3:15
Session # 9
Session Chair: Dr. Ifana Mahbub
Paper #
 9-1 SOBLPM: Stochastic Optimization Based Link Power Management for 3D-Stacked Memories
Session # 10: Special Session Edge Computing/IoT
Session Chair: Dr. Mimi Xie
Paper #
 10-1 Intelligent Routing for Self-sustaining IoT Edge
3:30 9-2 Essential Standard Cell Library Composition 10-2 Exploring the Sparsity of Deep Neural Network
3:45 9-3 Low-Power Asynchronous Level Crossing ADC Designed in 180nm CMOS Process for Electrophysiological Signal Recording Applications 10-3 On-device intelligence for energy harvesting devices
4:00 9-4 Comparative analysis of different Lab-At-Home equipment 10-4 A Multi-agent Reinforcement Learning Approach for Efficient Client Selection in Federated Learning
4:15 End of Day 2

June 19, 2022
Start time Session   Presentation/Paper Title
9:30  
9:45
Keynote Speaker # 4
10:45 Break
11:00
Session # 11: Special Session Special Session Sensing Circuits and Systems for Smart City Applications
Session Chair: Dr. Prabha Sundaravadivel
Paper #
 11-1 UAV-based travel assistive technology for smart transportation
 
 
  
11:15 11-2 FPGA-based assistive framework for smart home automation  
11:30 11-3 IoT enabled Smart Helmet for Automated and Multi-parametric Monitoring of Underground Miners’ Health Hazards  
11:45 11-4 FPGA-based smart chair recognition system using flex sensors  
12:00 11-5 A microneedle-based leaf patch with IoT integration for real-time monitoring of salinity stress in plants  
12:15 Lunch break
1:00
Industrial Presentation
# 3
2:00 End of Day 3